Semiconductors
Innovation in semiconductor design and manufacturing is enabling smaller device architectures with higher performance and more energy-efficient devices for powering the smart product revolution. The physics associated with shrinking geometries, especially in the emerging 3D-IC, FinFET and stacked-die architectures bring out design challenges related to power and reliability, affecting design closure. ANSYS simulation and modeling tools offer you the sign-off accuracy and performance needed to ensure the power noise integrity and reliability of even the most complex ICs, taking into account electromigration, thermal effects and electrostatic discharge phenomena.
This video briefly overviews the challenges and solutions addressed by Ansys Semiconductor software products for the Electronic Design Automation (EDA) market. Semiconductor design is going through an inflection point as designers face two significant challenges rooted in manufacturing advances: The first is the ongoing march of Moore’s Law into advanced finFET process technology below 5nm. We see newtransistor architectures like nanosheet gate-all-around (GAA) and back-side power delivery.The second set of challenges facing semiconductor designers relates to multi-die design, 2.5D/3D-IC packaging, and heterogeneous integration. Leading design teams have adopted these advances as they face various novel multiphysics challenges to succeed with 3D-IC. New multiphysics challenges include
- Thermal analysis and prototyping
- .Electromagnetic coupling (EMC/EMI) of interposer signals, even digital ones.
- Reliability issues from thermo-mechanical Stress & Warpage of multi-die assemblies.
PathFinder-SC
Ansys PathFinder-SC simulates electrostatic discharge (ESD) in full-chip SoC and IP designs for planning, verification and sign-off.
PowerArtist
Ansys PowerArtist provides early RTL power estimation and analysis-driven power reduction for RTL-to-GDS design for power methodology.
RedHawk-SC
Ansys RedHawk accurately predicts chip power and noise using voltage drop simulation analysis for the entire power delivery network (PDN), from chip to package to board.
Totem
Ansys Totem is a transistor-level power noise and reliability simulation platform for analog, mixed-signal and custom digital designs.