PDN Analyzer

Altium’s PDN Analyzer tool integrates directly with Altium Designer so you can easily troubleshoot and detect issues like insufficient or excessive copper, uncontrolled voltage drops, marginal voltage at critical power pins, copper islands or peninsulas and similar issues that may be present with the power system in your PCB design.

PDN refers to the power system on printed circuit boards for active circuits. This system includes all interconnections from the voltage regulator module and the metallization of pads and die on integrated circuits that are used to supply and return power current.

The PDN Analyzer (PDNA) application is relatively straightforward to use, and basically involves setting up the PI-DC simulation net parameters, running the simulation and then interpreting the results. The data used in a PDN Analyzer power net simulation is drawn directly from the currently loaded PCB design project, which can be iteratively edited to improve the power integrity of the supply paths and the PDN simulation then re-run to test the results.

PDN Analyzer Interface

The PDN Analyzer extension's interface is invoked as an Altium Designer non-modal window, which can be positioned in any convenient location in the workspace or on another screen, if available. To open the main PDN Analyzer window, open a project's schematic or PCB document and select the application from the Tools menu (Tools » PDN Analyzer).

The PDN Analyzer GUI with the complete power net hierarchy selected. The display of
the included networks and layers is controlled in the lower panel section.

The PDNA window GUI is arranged with an upper section devoted to file/net control and an interactive representation of the currently selected power network(s), while the lower panel section provides access to the analysis options, display settings and results data. Multiple, interconnected nets are supported by PDNA version 2, which allows the DC power integrity of an entire PCB design to be analyzed as a hierarchical structure or as individual power nets.

The PDN Analyzer GUI with a single power network selected. The display and results
configurations are available in the lower panel section.

The PDN interface also offers a compact screen mode (File » Compact Layout) that does not include the lower panel section, which is ideal for horizontal/vertical docking in the main Altium Designer screen. To enable screen docking for the compact or standard screen modes, right click in the PDNA interface title bar, select Allow Dock from the context menu and choose the Horizontally or Vertically option.

DC Net Identification

When the PDN Analyzer is initially opened for a PCB design, it will attempt to identify all DC power networks from the design's net data based on common power network nomenclature.  If all potential power nets have not been identified, deselect appropriate Qualifiers filter options, or to see all nets, select the Enable all nets for filtering option.

Use the Select check boxes to choose which power nets will be available to the PDNA analyzer, and enter suitable voltage levels in their matching Nominal Voltage fields. Click the Add Selected button to populate the Currently Identified DC Nets list and confirm these nets as identified power networks.

Note that double clicking on a listed net entry in the dialog will cross probe to that net in the PCB layout.

The PDN Analyzer improvements include:

  • Completely redesigned user interface.
    • More compact layout.
    • Integrated batch analysis.
    • Support for increased network complexity.
    • Detailed simulation results tables, including power reporting.
  • True simultaneous multi-net simulation and linking.
  • Voltage rail net nomination with PCB cross probe.
  • Multi-source support.
  • Intelligent voltage regulator modeling, including sense line support.
  • HTML report generation with image capture.
  • Trace, shape, and via current/density limits.
  • Series element model includes voltage drop parameter for diodes.
  • Visualization features, including:
    • Voltage contour.
    • Current direction.
    • Peak value location.
  • Differential voltage probe.